Difference between revisions of "Technologies for computer aided design"
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This research activity mainly focuses on the compact modeling of new fundamental devices such as ultimate transistors and also micro or nanoscale sensors developed within the team. | This research activity mainly focuses on the compact modeling of new fundamental devices such as ultimate transistors and also micro or nanoscale sensors developed within the team. | ||
| − | A large part of this activity has been dedicated to ultimate FET transistors modeling. For over 20 years now, our team has been closely working on that topic with teams from EPFL (Lausanne, Switzerland) and also URV (Tarragone, Spain). We carried out compact models for FinFET and multi-gate (featuring two, three, four gates and GAA) MOS devices. We have also been working on the modelling of junction-free nanowire-based FETs, which display promising performance | + | A large part of this activity has been dedicated to ultimate FET transistors modeling. For over 20 years now, our team has been closely working on that topic with teams from EPFL (Lausanne, Switzerland) and also URV (Tarragone, Spain). We carried out compact models for FinFET and multi-gate (featuring two, three, four gates and GAA) MOS devices. We have also been working on the modelling of junction-free nanowire-based FETs, which display promising performance in regard of future high-end IC technologies. |
<gallery widths=150px> | <gallery widths=150px> | ||
Revision as of 16:59, 30 May 2016
The integrating of ever more complex systems requires adapted conception tools and methods. Indeed, functional and technological constraints are constantly increasing with ever smaller tolerance and shorter time-to-market. In order to meet these constraints, the typical approaches need be revised and adapted, taking complementary concepts such as increased formalism, reuse and capitalization of knowledge bases into account.
The SMH team develops compact models and multiphysics design tools dedicated to analog and mixed signal integrated systems. We develop new conception approaches dedicated to multidisciplinary systems using formal specification and hardware description languages. This is done by extending the use of applied mathematics developed for other purposes, such as for instance interval arithmetic. The goal is to improve the computation speed while keeping as close as should be to the physical behavior of advanced devices.
Compact modeling
This research activity mainly focuses on the compact modeling of new fundamental devices such as ultimate transistors and also micro or nanoscale sensors developed within the team.
A large part of this activity has been dedicated to ultimate FET transistors modeling. For over 20 years now, our team has been closely working on that topic with teams from EPFL (Lausanne, Switzerland) and also URV (Tarragone, Spain). We carried out compact models for FinFET and multi-gate (featuring two, three, four gates and GAA) MOS devices. We have also been working on the modelling of junction-free nanowire-based FETs, which display promising performance in regard of future high-end IC technologies.
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Related projects
High-level multiphysics modeling and simulation tools
In order to be able to meet the ever growing requirements in IT and mobile devices, the IC manufacturers gradually turn to 3D integration, which consists in stacking chips in order to form complex single-package systems. Such an approach allows to look into the opportunity of new solutions to stick to Moore's law or evening achieve "more than Moore" performance, but it also come with several shortcomings. In particular, evacuating the heat produced within an integrated chip is particularly difficult and induces an increase of the average operating temperature and also hotter spots. Besides being responsible for higher power consumption, these thermal issues also induce additional mechanical constraints due to material expansion and have overall negative impact on chips' reliability.
As it is the aging mechanisms that occur in integrated circuits (electromigration NBTI,...) are all the more important with high temperature. In order to minimize these harmful effects, it has now become essential to take thermal and mechanical characteristics at the early stage of IC development.
In that context, since 2009 we have been working on the development of an multiphysics (i.e. electrothermal and mechanical) simulator, embedded into one of industry's standard CAD tool, namely CADENCE®. Now, our team is in possession of an experimentally validated operational tool dedicated to simulating electrothermal and mechanical behavior in the IC engineering flow. This enables high accuracy circuit behavior simulation and should ultimately allow accurate forecasting of an integrated system's lifetime, i.e. prior to failure.
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Related projects
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