Équipe SMH : Systèmes et Microsystèmes Hétérogènes

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Les travaux de recherche visent à développer des modèles compacts pour les dispositifs consacrés aux circuits analogiques et mixtes. L’objectif est d’apporter des solutions simples, numériquement efficaces et proches de la physique du dispositif. Le premier sujet de recherches traite de la modélisation compacte des transistors MOSFET conventionnels, dits bulk, fortement submicroniques. Il fait l’objet d’une collaboration étroite avec le groupe EKV (LEG-EPFL). Parallèlement à la modélisation compacte des dispositifs CMOS fortement submicroniques, l’étude et la modélisation des transistors multi-grilles (MOSFET à double grille, FinFET) et des transistors à nanotubes de carbone (CNTFET) sont devenues prioritaires. Ces dispositifs devant succéder aux MOSFET conventionnels, ils exigent un effort de recherche important. Il est donc indispensable de développer des modèles performants prenant en compte les nouvelles caractéristiques de ces dispositifs dans le but d’établir un lien fort entre les aspects technologiques et systèmes. Un autre sujet de recherches concerne la modélisation des systèmes à signaux mixtes avec le langage VHDL-AMS. Et enfin, le dernier sujet de recherche concerne la biologie synthétique et l'élaboration des outils CAO associés.
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The integrating of ever more complex systems requires adapted conception tools and methods. Indeed, functional and technological constraints are constantly increasing with ever smaller tolerance and shorter time-to-market. In order to meet these constraints, the typical approaches need be revised and adapted, taking complementary concepts such as increased formalism, reuse and capitalization of knowledge bases into account.
  
== MOSFET Bulk ==
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The SMH team develops compact models and multiphysics design tools dedicated to analog and mixed signal integrated systems. We develop new conception approaches dedicated to multidisciplinary systems using formal specification and hardware description languages. This is done by extending the use of applied mathematics developed for other purposes, such as for instance interval arithmetic. The goal is to improve the computation speed while keeping as close as should be to the physical behavior of advanced devices.
  
Ce thème de recherche est dédié à la modélisation compacte de MOSFET conventionnels, dits bulk, fortement submicroniques en vue de leur utilisation pour la conception de circuits analogiques et mixtes. L’objectif principal est d’apporter des solutions simples, numériquement efficaces et proches de la physique du dispositif.
 
  
L’équipe est impliquée dans le groupe de travail Européen MOS-AK dédié à la modélisation du MOSFET-Bulk et à la caractérisation [http://www.mos-ak.org/ Lien]. En 2005 elle a organisé une rencontre MOS-AK à Strasbourg en coopération avec l’école d’ingénieurs Télécom Physique Strasbourg [http://www.mos-ak.org/strasbourg/index.html Lien].
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== Compact modeling ==
  
L’équipe est par ailleurs associée au groupe EKV (LEG-EPFL). Une version bêta du modèle MOS EKV v2.6 développée en VHDL-AMS peut être obtenue par téléchargement [http://lsmwww.epfl.ch/models/compact/ Lien].
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[[File:CNTFET_percolation.png|160px|thumb|right|link=Technologies_for_computer_aided_design#Compact_modeling|[http://icube-smh.unistra.fr/en/index.php/Technologies_for_computer_aided_design#Compact_modeling Resistance network extraction steps from randomly scattered carbon nanotubes (CNT)]]]
  
== Transistors Multi-grilles (MuGFET) ==
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This research activity mainly focuses on the compact modeling of new fundamental devices such as ultimate transistors and also micro or nanoscale sensors developed within the team.
  
[[Fichier:FinFET.png|150px|thumb|right|Structure 3D du FinFET]]
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A large part of this activity has been dedicated to ultimate FET transistors modeling. For over 20 years now, our team has been closely working on that topic with teams from EPFL (Lausanne, Switzerland) and also URV (Tarragone, Spain). We carried out compact models for FinFET and multi-gate (featuring two, three, four gates and GAA) MOS devices. We have also been working on the modeling of junction-free nanowire-based FETs, which display promising performance in regard of future high-end IC technologies.
  
Ce thème de recherche est dédié à la modélisation compacte de transistors multi-grilles (MOSFETs à double grille, FinFET) nanométriques en vue de leur utilisation pour la conception de circuits analogiques et mixtes. L’objectif principal est d’apporter des solutions simples, numériquement efficaces et proches de la physique du dispositif.
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Sensors modeling is another part of our activity and represents a necessary step for optimizing integrated instrumentation systems. Within that framework we developed models for magnetic sensors based on the Hall effect ([[Multiphysics_systems_and_microsystems#Integrated_magnetic_sensors|HHD and VHD]]) and charge deflection ([[Multiphysics_systems_and_microsystems#Integrated_magnetic_sensors|CHOPFET]]).
  
* Depuis décembre 2008, nous sommes impliqué dans le projet Européen COMON (COmpact MOdelling Network) de type FP7 - IAPP Marie Curie) [http://compactmodelling.eu/ Lien].
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More recently we started new research projects on the modeling of chemical sensors. We have been specifically studying two kinds of sensors, carbon nanotube FET ([[Multiphysics_systems_and_microsystems#Chemical_sensors|CNTFET]]) on one hand and ion sensitive FET (ISFET) on the other. Both devices can be potentially functionalized in order to be used as biosensors.
Résumé du projet: Développement d’une chaîne de développement complète de modélisation compacte de technologies CMOS et III-V avancées, du niveau technologique au niveau système.
 
Ce projet est composé de 15 partenaires européens: 9 laboratoires universitaires, 6 industriels.
 
  
Notre groupe travaille sur le WP relatif à la modélisation compacte des transistors DG-MOSFET et FinFET.
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<gallery widths=150px>
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File:FinFET.png|link=Technologies_for_computer_aided_design#Compact_modeling|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#Compact_modeling FinFET 3D FEM view]
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File:CHOPFET_sim.png|link=Technologies_for_computer_aided_design#Compact_modeling|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#Compact_modeling Magnetic sensor CHOPFET FEM simulation]
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File:CNTFET_Captex.jpeg|link=Technologies_for_computer_aided_design#Compact_modeling|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#Compact_modeling Carbon nanotubes-based chemical sensor]
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</gallery>
  
== CNTFET ==
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==== <u>Related projects</u> ====
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The principal projects related to the compact modeling activities are:
  
Les nanotechnologies sont un secteur innovant et prometteur qui présente de nombreuses perspectives d’applications. Afin que les attentes à leur égard deviennent des réalités, un important effort de recherche fondamentale et appliquée est au préalable nécessaire. Les transistors à effet de champ à base de nanotubes de carbone (Carbon NanoTube Field Effet Transistors, CNTFET) figurent aujourd’hui parmi les dispositifs susceptibles de remplacer la technologie CMOS.
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*FP7 COMON, ended 2012, "Modeling of multi-gate SOI transistors and of junction-free nanowire-based transistors"
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*XYZ-IRM project, "Development of a dedicated system for active minimally-invasive surgery tools tracking in IRM environment"
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*ANR CAPTEX, 2010-2013, "Modeling of CNTFET-based explosive gas sensors and development of their dedicated fully integrated conditioning electronics"
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*industrial project in collaboration with BURKERT company, "Virtual prototyping of Lab-on-Chip (LoC) for pollutant detection"
  
* De septembre 2004 à septembre 2006, notre équipe a fait partie du projet français Nanosys "Architectures pour l'intégration des nanocomposants moléculaires"  [http://www.r3n.org/com/archives/J3N2006-images/docs/ACI-Nanosys.pdf Lien]. Ce projet avait pour objectif de produire une description détaillée d’une électronique nouvelle s’appuyant sur les CNTFET. En particulier, nous nous sommes concentrés sur le développement d’un modèle compact et proche de la physique des CNTFET.
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<gallery widths=150px>
* Depuis mars 2010, nous sommes dans le projet ANR CAPTEX : "Réalisation d’un Multi-CAPTeur intelligent de traces d’EXplosifs hautement sélectif et sensible à base de matrices de transistors à nanotubes de carbone [http://www.trt.thalesgroup.com/captex/ Lien].
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File:DG_MOSFET.png|link=Technologies_for_computer_aided_design#Computer_aided_conception_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#Computer_aided_conception_tools DG MOSFET structure]
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File:DG_MOSFET_sim.png|link=Technologies_for_computer_aided_design#Computer_aided_conception_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#Computer_aided_conception_tools DG MOSFET gate transconductance characteristic]
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File:CNTFET_characteristic.png|link=Technologies_for_computer_aided_design#Computer_aided_conception_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#Computer_aided_conception_tools Carbon nanotube FET (CNTFET) characteristic]
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</gallery>
  
[[Fichier:CNTFET_Captex.jpeg|200px|thumb|right|Multicapteur à base de réseaux CNTFETs]]
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== High-level multiphysics modeling and simulation tools ==
Résumé général du projet CAPTEX
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[[File:ET_tool.png|300px|thumbnail|right|link=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools|[http://icube-smh.unistra.fr/en/index.php/Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools Electrothermal simulator]]]
  
Le projet CAPTEX propose d’apporter une solution innovante au problème de la détection des traces d’explosifs à base de peroxydes. L’objectif principal du projet est la réalisation d’un dispositif intelligent pour la détection de traces de ce type d’explosifs qui puisse garantir une mesure rapide, sélective et très sensible. A ce jour, aucun dispositif efficace n’existe pour la détection des traces de ces substances, comme le montre clairement l’analyse de l’état de l’art. Dans le cadre du projet CAPTEX, nous visons la réalisation d’un capteur intégré qui sera embarqué sur un véhicule robotisé mobile pour la détection de traces à distance. Plus précisément, nous voulons fabriquer des capteurs ultra compacts fonctionnant à température ambiante, caractérisés par une très faible consommation (< 1mmW), rapides (quelques secondes pour le temps de réponse et une minute environ pour la remise à zéro), hautement sensibles et sélectifs.
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In order to be able to meet the ever growing requirements in IT and mobile devices, the IC manufacturers gradually turn to 3D integration, which consists in stacking chips thus forming complex single-package systems. Such an approach allows to look into the opportunity of new solutions to stick to Moore's law or even achieve "more than Moore" performance, but it also come with several shortcomings. In particular, evacuating the heat produced within an integrated chip is particularly difficult and induces an increase of the average operating temperature and also hotter spots. Besides being responsible for higher power consumption, these thermal issues also induce additional mechanical constraints due to material expansion and have overall negative impact on chips' reliability.
  
== Modélisation compacte en VHDL-AMS, et en Verilog-A ==
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As it is the aging mechanisms that occur in integrated circuits (electromigration NBTI,...) are all the more important with high temperature. In order to minimize these harmful effects, it has now become essential to take thermal and mechanical characteristics at the early stage of IC development.
  
Parallèlement au développement de modèles compacts, les travaux visent également à mettre au point des solutions efficaces pour la modélisation des systèmes à signaux mixtes avec les langages VHDL-AMS, ou Verilog-A.
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In that context, since 2009 we have been working on the development of a multiphysics (i.e. electrothermal and mechanical) simulator, embedded into one of industry's standard CAD tool, namely CADENCE®. Now, our team is in possession of an experimentally validated operational tool dedicated to simulating electrothermal and mechanical behavior in the IC engineering flow. This enables high accuracy circuit behavior simulation and should ultimately allow accurate forecasting of an integrated system's lifetime, i.e. prior to failure.
  
Dans le prolongement de sa participation à la mise au point du modèle MOS EKV v2.6, Christophe Lallement¹ a développé avec François Pêcheux² plusieurs versions de ce modèle (avec ou sans les interactions thermo-électriques) dans le langage VHDL-AMS.
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<gallery widths=150px>
Des documents sur ces versions du modèle MOSFET EKV v2.6 peuvent être téléchargés ci-dessous :
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File:Die_model.png|link=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools Stress map - Silicon die structure model for electrothermal simulation]
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File:Die_expansion.png|link=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools Electrothermal simulation on silicon cube]
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File:3D_mesh.png|link=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools Stress map - Die expansion]
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</gallery>
  
*Différentes versions du modèle MOSFET EKV v2.6 en VHDL-AMS
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==== <u>Related projects</u> ====
Les modèles VHDL-AMS, avec ou sans les interactions thermo-électriques, sont discutés dans le chapitre 9 du livre Transistor Level Modeling for Analog/RF IC Design publié par Springer [http://www.springer.com/engineering/circuits+%26+systems/book/978-1-4020-4555-4 Lien].
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The principal projects related to the compact modeling activities are:
Les versions bêta du modèle MOSFET EKV v2.6 développé en VHDL-AMS(C. Lallement, F. Pêcheux), avec ou sans les interactions thermo-électriques, sont consultables ici [http://lsmwww.epfl.ch/models/compact/ Lien].
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*ANR 3D-IDEAS, ended 2012, "Integration and 3D conception technology for imaging systems and applications"
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*
  
¹ Christophe Lallement est l’un des auteurs du modèle MOSFET EKV v2.6.  
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<gallery widths=150px>
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File:Spring-mass-damper.png|link=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools Spring-mass-damper model]
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File:Chip+ThermMap.png|link=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools Thermal map of CMOS IC]
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File:Thermal_measurments.png|link=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools|[http://icube-smh.unistra.fr/en/index.php?title=Technologies_for_computer_aided_design#High-level_multiphysics_modeling_and_simulation_tools IC thermal measurments]
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</gallery>
  
² François Pêcheux est au ASIM/LIP6, Département Architecture des Systèmes Intégrés et Micro-électronique, Laboratoire d’Informatique de Paris 6, France
 
  
* D’autres documents sur la modélisation compacte peuvent également être téléchargés ci-dessous :
 
  
Documentation EKV 2.6 The EPFL-EKV MOSFET Model Equations for Simulation (M. Bucher, C. Lallement, C. Enz, F. Théodoloz, F. Krummenacher) [http://ekv.epfl.ch/files/content/sites/ekv/files/pdf/ekv_v262.pdf Lien].
 
  
Version bêta d’une version simplifiée du modèle MM11 avec les effets quantiques développé en VHDL-AMS (F. Prégaldiny, C. Lallement) [http://lsmwww.epfl.ch/models/compact/ Lien].
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[[En:]]
Cette étude est une version simplifiée du modèle Philips MM11 qui prend en compte les effets quantiques. MM11 est un modèle compact de MOSFET basé sur la formulation du potentiel de surface.
 
 
 
* Publication de référence sur les VHDL-AMS et Verilog-AMS:
 
"VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems", F. Pêcheux, C. Lallement, A. Vachoux, IEEE Trans. Comput.-aided Des. Integr. Circuits Syst. 24(2005)204.
 
 
 
Le schéma du système airbag étudié dans l'article est donné ci-après :
 
 
 
[[Fichier:fichier.gif|center]]
 
 
 
== Biologie synthétique ==
 
 
 
[[Fichier:fichier.png|200px|thumb|right]]
 
 
 
La biologie synthétique est une science récente, issue du rapprochement entre les biotechnologies et les sciences pour l’ingénieur. Elle tend à créer des organismes nouveaux par une combinaison rationnelle d’éléments biologiques standardisés qui sont découplés de leur contexte naturel. Il s’agit d’une extension de la biotechnologie, avec le but ultime d’être capable de concevoir et construire des systèmes biologiques fabriqués qui traitent l’information, manipulent les éléments chimiques, produisent de l’énergie, fournissent de la nourriture et maintiennent et améliorent la santé humaine et notre environnement.
 
 
 
Depuis 2008 notre équipe travaille sur la modélisation de dispositifs biologiques, ayant pour but de fournir des modèles adaptés et efficaces pour la biologie synthétique, aux outils d'aide à la conception qui sont développé au sein de la thématique [[Technologie de la conception]].
 
 
 
Nous avons déjà participé à trois éditions de l’iGEM (international Genetically Engineered Machine competition) en 2008, 2010 [http://2010.igem.org/Team:ESBS-Strasbourg Lien], et 2011 [http://2011.igem.org/Team:ENSPS-Strasbourg Lien] organisé par le MIT.
 
 
 
== Publications de la thématique ==
 
 
 
 
 
'''Publications depuis 2000'''
 
 
 
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2014
 
 
 
* J. Haiech, Y. Gendrault, M.-C. Kilhoffer, R. Ranjeva, M. Madec, C. Lallement, “A general framework improving teaching ligand binding to a macromolecule”, in BBA(Biochimica et Biophysica Acta) - Molecular Cell Research, under press, 2014
 
 
 
* Y. Gendrault, M. Madec, C. Lallement, J. Haiech, “Modeling biology with HDL languages: a first step toward a Genetic Design Automation tool inspired from microelectronics” in IEEE Transactions on Biomedical Engineering, n° 4, vol. 61,  pages 1231-1240, avril 2014.
 
 
 
* M. MADEC, F. Pêcheux, F. Jezequel, Y. GENDRAULT, C. LALLEMENT, J. Haiech
 
:: Opportunities and challenges for the virtual prototyping of synthetic biological functions
 
:: in Proc. IEEE ISCAS 2014, 1-5 June 2014, Melbourne (Australia), to be published.
 
 
 
 
 
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2013
 
 
 
* J.-M. Sallese, F. Jazaeri, L. Barbut, N. Chevillon, C. LALLEMENT
 
:: A Common Core Model for Junctionless Nanowires and Symmetric Double-Gate FETs
 
:: IEEE Transaction on Electron Devices, Vol. 60, pages: 4277-4280,  Déc. 2013
 
 
 
* M. MADEC,  J.- B. Schell, J. – B. Kammerer, C. LALLEMENT, L. HÉBRARD
 
:: Compact modeling of vertical hall-effect devices: electrical behavior
 
:: Analog Integrated Circuits and Signal Processing , Vol. 77,  Issue: 2  Special Issue, pages: 183-195, Nov 2013.
 
 
 
* Y. Gendrault, M. MADEC, V. Vlotzko, LALLEMENT, J. Haiech,
 
:: Fuzzy logic, an efficient intermediate abstraction level for synthetic biology
 
:: in Proc. of BioCAS 2013, 31 oct.-2 nov. 2013, Rotterdam (NL), Proc. 370 - 373.
 
 
 
* M. MADEC, F. Pêcheux, Y. GENDRAULT, L. Bauer, C. LALLEMENT
 
:: EDA inspired Open-source Framework for Synthetic Biology
 
:: in Proc. of BioCAS 2013, 31 oct.-2 nov. 2013, Rotterdam (NL), Proc. 374 - 377.
 
 
 
* A. Yesayan, F. PRÉGALDINY and J.-M. Sallese
 
:: Explicit drain current model of junctionless double-gate field-effect transistors
 
:: Solid-State Electronics, vol. 89, pp. 134–138, Nov. 2013.
 
 
 
* M. MADEC, J.-B. SCHELL, J.-B. KAMMERER, C. LALLEMENT, L. HÉBRARD
 
:: An Improved Compact Model of the Electrical Behaviour of the 5-Contact Vertical Hall-effect Device
 
:: 11th IEEE International New Circuits and Systems Conference (NEWCAS), Paris, France, Juin 16-19, 2013, pages 1-4
 
 
 
 
 
 
 
 
 
 
 
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2012
 
 
 
* CHEVILLON N., SALLESE J.-M., LALLEMENT C., PRÉGALDINY F., MADEC M., SEDLMEIR J. and AGHASSI J.
 
::''Generalization of the Concept of Equivalent Thickness and Capacitance to Multigate MOSFETs Modeling''
 
::IEEE Transaction on Electron Devices, vol. 59, N° 1, pages 60-71, 2012 [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6062403&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D6062403 Lien]
 
 
 
* HEITZ J., DUMAS N., FRICK V., LALLEMENT C., HÉBRARD L.,
 
:: ''Modeling and optimization of a Ker charge pump loaded by a resistive circuit'',
 
:: 19th IEEE International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2012), Warsaw (Poland), May 24-26, 2012, Proc. pp. 376-381. Lien
 
 
 
* MADEC M., SCHELL J.B., KAMMERER J.B., LALLEMENT C., HÉBRARD L.,
 
:: ''Compact modeling of vertical Hall-effect devices: Electrical behavior'',
 
:: 10th IEEE International NEWCAS Conference (NEWCAS 2012), Montreal (Canada), June 17-20, 2012, Proc. pp. 213-216. Lien
 
 
 
 
 
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2011
 
 
 
* GENDRAULT Y., MADEC M., LALLEMENT C., PÊCHEUX F., HAIECH J.,
 
::''Synthetic biology methodology and model refinement based on microelectronic modeling tools and languages''
 
:: Biotechnologies Journal, vol. 6, pp. 796-806, 2011. [http://onlinelibrary.wiley.com/doi/10.1002/biot.201100083/abstract Lien]
 
* HEITZ J., LEROY Y., HÉBRARD L., LALLEMENT C.,
 
::''Theoretical characterization of the topology of connected carbon nanotubes in random networks'',
 
::Nanotechnology 22, 345703, pages 1-7, 2011. [http://iopscience.iop.org/0957-4484/22/34/345703 Lien]
 
* SALLESE J.-M., CHEVILLON N., LALLEMENT C., IÑIGUEZ B., PRÉGALDINY F.,
 
::''Charge Based Modelling of Junctionless Double Gate Field-Effect Transistors'',
 
:: IEEE Transactions on Electron Devices,vol. 58, pages 2628-2637, août 2011.[http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=5872019&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D5872019 Lien]
 
* YESAYAN A., PRÉGALDINY F., CHEVILLON N., LALLEMENT C., SALLESE J.-M.,
 
::''Physics-based compact model for ultra-scaled finFETs'',
 
::Solid-State Electronics, vol. 62, pages 165-173, août 2011.[http://www.sciencedirect.com/science/article/pii/S0038110111000992 Lien]
 
* SALLESE J.M., PRÉGALDINY F., LALLEMENT C.
 
:: ''Double-gate MOSFETs for SOI technologies''
 
:: Nano-Tera Workshop on the Next Generation MOSFET Compact Models, Lausanne (Switzerland), December 15-16, 2011. Lien
 
 
 
 
 
 
 
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2010
 
 
 
* SALLESE J.M., CHEVILLON N., PRÉGALDINY F., LALLEMENT C., IÑIGUEZ B.,
 
:: ''The equivalent-thickness concept for doped symmetric DG MOSFETs'',
 
:: IEEE Transactions on Electron Devices 57, 2010, pp. 2917-2924. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=5580040&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Farnumber%3D5580040 Lien].
 
 
 
* GENDRAULT Y., MADEC M., LALLEMENT C., HAIECH J.,
 
::''A design kit for synthetic biology'',
 
:: International Conference on Synthetic Biology, Evry (France), December 15-16, 2010.
 
 
 
* GENDRAULT Y., MADEC M., LALLEMENT C., HAIECH J.,
 
:: ''Multi-abstraction modeling in synthetic biology'',
 
:: 3rd IEEE International Symposium on Applied Sciences in Biomedical and Communication Technologies (ISABEL 2010), Rome (Italy), November 7-10, 2010, Proc. pp. 1-5. Lien
 
 
 
* MADEC M., GENDRAULT Y., LALLEMENT C., HAIECH J.,
 
:: ''Design methodology and modeling for synthetic biosystems'',
 
:: Int. J. Microelectron. Comput. Sci. 1, 2010, pp. 147-155.
 
 
 
* MADEC M., LALLEMENT C., GENDRAULT Y., HAIECH J.,
 
:: ''La microélectronique et la biologie synthétique'',
 
:: Conference Savoir en commun "Le Corps", Strasbourg (France), November 18, 2010. Lien
 
 
 
* MADEC M., LALLEMENT C., GENDRAULT Y., HAIECH J.,
 
:: ''Design methodology for synthetic biosystems'', 
 
::17th IEEE International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2010), Wrocaw (Poland), June 24-26, 2010, Proc. pp. 621-626. Lien
 
 
 
* PÊCHEUX F., MADEC M., LALLEMENT C.,
 
:: ''Is SystemC-AMS an appropriate "promoter" for the modeling and simulation of bio-compatible systems?'',
 
:: IEEE International Symposium on Circuits and Systems (ISCAS 2010), Paris (France), May 30 - June 2, 2010, Proc. pp. 1791-1794. Lien
 
 
 
* YESAYAN A., CHEVILLON N., PRÉGALDINY F., LALLEMENT C.,
 
:: ''Compact physics-based model for ultrashort FinFETs'',
 
:: 17th IEEE International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2010), Wroclaw (Poland), June 24-26, 2010, Proc. pp. 75-80. Lien
 
 
 
 
 
 
 
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2009
 
 
 
* TANG M., PRÉGALDINY F., LALLEMENT C., SALLESE J.M.,
 
:: ''Explicit compact model for ultranarrow body FinFETs'',
 
:: IEEE Transactions on Electron Devices 56, 2009, pp. 1543-1547. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4912414&count=28&index=24&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Fisnumber%3D5075842%26arnumber%3D4912414%26count%3D28%26index%3D24 Lien].
 
 
 
* CHEVILLON N., TANG M., PRÉGALDINY F., MADEC M., LALLEMENT C.,
 
:: ''Modèle compact de FinFET et extraction de paramètres'',
 
:: Journées-atelier des Groupement de Recherche SiP SoC et Nanoélectronique, Bordeaux (France), December 9-11, 2009.
 
 
 
* CHEVILLON N., TANG M., PRÉGALDINY F., LALLEMENT C., MADEC M.,
 
:: ''FinFET compact modeling and parameter extraction'',
 
:: 16th IEEE International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2009), Lodz (Poland), June 25-27, 2009, Proc. pp. 55-60, papier invité. Lien
 
 
 
* LALLEMENT C.,
 
:: ''Modélisation compacte FINFET'',
 
:: Journées-atelier des Groupement de Recherche SiP SoC et Nanoélectronique, Bordeaux (France), December 9-11, 2009, papier invité.
 
 
 
* MADEC M., LALLEMENT C., KARSTENS K., DITTMAN S., GERSBACHER M., SORG R., WILD M., MULLER M., BOURGINE P., DONZEAU M., HAIECH J.,
 
::''Synthetic biology and microelectronics: A similar design flow'',
 
:: Joint 7th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA'09), Toulouse (France), June 28 - July 1, 2009, Proc. pp. 1-4. Lien
 
 
 
* TANG M., PRÉGALDINY F., LALLEMENT C., SALLESE J.M.,
 
:: ''Quantum compact model for ultra-narrow body FinFET'',
 
:: 10th IEEE International Conference on ULtimate Integration of Silicon (ULIS09), Aachen (Germany), March 18-20, 2009, Proc. pp. 293-296. Lien
 
 
 
* TANG M., PRÉGALDINY F., LALLEMENT C.,
 
:: ''Quantum compact model for ultra-short and ultra-narrow body FinFET'',
 
:: MOS-AK Meeting of the MOS Modeling and Parameter Extraction Group, Frankfurt /Oder (Germany), April 2-3, 2009. Lien
 
 
 
* TANG M., PRÉGALDINY F., LALLEMENT C.,
 
:: ''Compact modeling of both n- and p-type ultra-short FinFETs'',
 
:: Joint 7th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA'09), Toulouse (France), June 28 - July 1, 2009, Proc. pp. 1-4. Lien
 
 
 
 
 
 
 
----
 
 
 
2008
 
 
 
* DIAGNE B., PRÉGALDINY F., LALLEMENT C., SALLESE J.M., KRUMMENACHER F.,
 
:: ''Explicit compact model for symmetric double-gate MOSFETs including solutions for small-geometry effects,''
 
:: Solid-State Electronics 52, 2008, pp. 99-106. [http://www.sciencedirect.com/science/article/pii/S0038110107002171 Lien].
 
 
 
* MADEC M., KAMMERER J.B., PRÉGALDINY F., HÉBRARD L., LALLEMENT C.,
 
:: ''Compact modeling of magnetic tunnel junction'',
 
:: Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA'08), Montréal (Canada), June 22-25, 2008, Proc. pp. 229-232. Lien
 
 
 
 
 
 
 
----
 
 
 
2007
 
 
 
* O’CONNOR I., LIU J., GAFFIOT F., PRÉGALDINY F., LALLEMENT C., MANEUX C., GOGUET J., FRÉGONÈSE S., ZIMMER T., ANGHEL L., DANG T., LEVEUGLE R.,
 
:: ''CNTFET Modeling and Reconfigurable Logic Circuit Design'',
 
:: IEEE Transactions on Circuits and Systems - I: Regular papers, vol. 54, n°11, pages 2365 - 2379, novembre 2007. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4383253&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D4383253 Lien]
 
 
 
* GRABINSKI W., GRASSER T., GILDENBLAT G., SMIT G., BUCHER M., AARTS A.C.T., TAJIC A., CHAUHAN Y.S., NAPIERALSKI A., FJELDLY T.A., IÑIGUEZ B., IANNACCONE G., KAYAL M., POSCH W., WACHUTKA G., PRÉGALDINY F., LALLEMENT C., LEMAITRE L.,
 
::''MOS-AK: Open compact modeling forum'',
 
:: 4th International Workshop on Compact Modeling (IWCM 2007), Yokohama (Japan), January 23, 2007, papier invité. Lien
 
 
 
 
 
 
 
----
 
 
 
2006
 
 
 
* PRÉGALDINY F., LALLEMENT C., DIAGNE B., SALLESE J.M., KRUMMENACHER F.,
 
:: ''Compact modeling of emerging technologies with VHDL-AMS'',
 
:: Advances in Design and Specification Languages for Embedded Systems, 2007, pp. 5-21, Forum on specification & Design Languages (FDL'06), Darmstadt (Germany), September 19-22, 2006, Proc. pp. 23-30, edited by S.A. Huss, Springer, ISBN 978-1-4020-6147-9. Lien
 
 
 
* DIAGNE B., PRÉGALDINY F., LALLEMENT C., SALLESE J.M., KRUMMENACHER F.,
 
:: ''Modèle compact de DG MOSFET dédié à la conception de circuits'',
 
:: 7ème Colloque sur le Traitement Analogique de l'Information, du Signal et ses Applications (TAISA'2006), Strasbourg (France), October 19-20, 2006, Actes pp. 105-108.
 
 
 
* DIAGNE B., PRÉGALDINY F., LALLEMENT C.,
 
:: ''Modèle compact de transistor MOS double-grille pour la simulation de circuits'',
 
:: IXèmes Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM'2006), Rennes (France), May 10-12, 2006.
 
 
 
* LALLEMENT C., PÊCHEUX F., VACHOUX A., PRÉGALDINY F.,
 
:: ''Compact modeling of the MOSFET in VHDL-AMS'',
 
:: Transistor level modeling for analog/RF IC design, 2006, pp. 243-269, edited by W. Grabinski, B. Nauwelaers, D. Schreurs, Springer Verlag, ISBN 1-4020-4555-7. Lien
 
 
 
* PRÉGALDINY F., KRUMMENACHER F., SALLESE J.M., DIAGNE B., LALLEMENT C.,
 
:: ''An explicit quasi-static charge-based compact model for symmetric DG MOSFET'',
 
:: Workshop on Compact Modeling, NSTI Nanotech 2006, Boston (USA), May 7-11, 2006, Proc. pp. 686-691, ISBN 0-9767985-8-1, papier invité. Lien
 
 
 
* PRÉGALDINY F., KRUMMENACHER F., DIAGNE B., PÊCHEUX F., SALLESE J.M., LALLEMENT C.,
 
:: ''Explicit modelling of the double-gate MOSFET with VHDL-AMS'',
 
:: Int. J. Numer. Model.: Electron. Netw. Devices Fields 19, 2006, pp. 239-256. [http://onlinelibrary.wiley.com/doi/10.1002/jnm.609/abstract Lien].
 
 
 
* PRÉGALDINY F., LALLEMENT C., KAMMERER J.B.,
 
:: ''Design-oriented compact models for CNTFETs'',
 
:: 1st IEEE International Conference on Design & Test of Integrated Systems in nanoscale technology (DTIS 06), Tunis (Tunisia), September 5-7, 2006, Proc. pp. 34-39, papier invité. Lien
 
 
 
* PRÉGALDINY F., KAMMERER J.B., LALLEMENT C.,
 
:: ''Compact modeling and applications of CNTFETs for analog and digital circuit design'',
 
:: 13th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), Nice (France), December 10-13, 2006, Proc. pp. 1030-1033. Lien
 
 
 
 
 
 
 
----
 
 
 
2005
 
 
 
* PÊCHEUX F., LALLEMENT C., VACHOUX A.
 
::''VHDL-AMS and Verilog-AMS as alternative HDL's for the Efficient Modeling of Multi-disciplines Schemes'',
 
:: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, n°2, pages 204-225, février 2005. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1386377&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D1386377 Lien]
 
* SALLESE J.-M., KRUMMENACHER F., PRÉGALDINY F., LALLEMENT C., ROY A., ENZ C.,
 
:: ''A design oriented current model for DG MOSFET and its correlation with the EKV formalism'',
 
:: Solid-State Electronics, vol. 49 pages 485-489, mars 2005. [http://www.sciencedirect.com/science/article/pii/S0038110104003491 Lien]
 
 
 
*DIAGNE B., PRÉGALDINY F., KRUMMENACHER F., PÊCHEUX F., SALLESE J.M., LALLEMENT C.,
 
:: ''Design oriented model for symmetrical DG-MOSGET'',
 
:: MOS-AK Meeting, Strasbourg (France), April 8, 2005. Lien
 
 
 
* PÊCHEUX F., ALLARD B., LALLEMENT C., VACHOUX A., MOREL H.,
 
:: ''Modeling and simulation of multi-discipline systems using bond graphs and VHDL-AMS'',
 
:: International Conference on Bond Graph Modeling and Simulation (ICBGM'2005), New Orleans (USA), January 23-27, 2005. Lien
 
 
 
* PRÉGALDINY F., LALLEMENT C.,
 
:: ''Fourth generation MOSFET model and its VHDL-AMS implementation'',
 
:: Int. J. Numer. Model.: Electron. Netw. Devices Fields 18, 2005, pp. 39-48. [http://onlinelibrary.wiley.com/doi/10.1002/jnm.560/abstract Lien].
 
 
 
* PRÉGALDINY F., KRUMMENACHER F., DIAGNE B., ROY A., SALLESE J.M., LALLEMENT C.,
 
:: ''A closed-form compact model for symmetric Double-Gate (DG) MOSFETs'',
 
:: MOS-AK Workshop, Grenoble (France), September 16, 2005. Lien
 
 
 
 
 
 
 
----
 
 
 
2004
 
 
 
* PRÉGALDINY F., LALLEMENT C., MATHIOT D.,
 
:: ''Accounting for quantum mechanical effects from accumulation to inversion, in a fully analytical surface-potential-based MOSFET model'',
 
:: Solid-State Electronics, vol. 48, n° 5, pages 781-787, mai 2004. [http://www.sciencedirect.com/science/article/pii/S0038110103004313  Lien]
 
 
 
* BUCHER M., LALLEMENT C., KRUMMENACHER F., ENZ C.,
 
:: ''A MOS transistor model for mixed analog-digital circuit design and simulation'',
 
:: Design of system on a chip: Devices & components, 2004, pp. 49-96, edited by R. Reis, J. Jess, Kluwer Academic Publishers, ISBN 1-4020-7928-1.
 
 
 
* LALLEMENT C., PÊCHEUX F., GRABINSKI W.,
 
::''High level description of thermodynamical effects in the EKV 2.6 MOST model'',
 
:: EKV 2.6 Users' Meeting, Lausanne (Switzerland), November 4, 2004, papier invité. Lien
 
 
 
* PRÉGALDINY F., LALLEMENT C.,
 
:: ''Fourth generation MOSFET model and its VHDL-AMS implementation'',
 
:: MOS Modeling and Parameter Extraction Group Meeting, Stuttgart (Germany), May 7, 2004, papier invité. Lien
 
 
 
*SALLESE J.M., ROY A., KRUMMENACHER F., PRÉGALDINY F., LALLEMENT C., ENZ C.,
 
:: ''A design oriented current model for symmetrical DG MOSFET: Correlation with the EKV formalism, EKV 3.0'',
 
:: Workshop, Lausanne (Switzerland), November 5, 2004, papier invité.
 
 
 
 
 
 
 
----
 
 
 
2003
 
 
 
* LALLEMENT C., SALLESE J.M., BUCHER M., GRABINSKI W., FAZAN P.C.,
 
:: ''Accounting for quantum effects and polysilicon depletion from weak to strong inversion in a charge-based design-oriented MOSFET model'',
 
:: IEEE Transactions on Electron Devices 50, 2003, pp. 406-417. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1196085&count=43&index=20&url=http%3A%2F%2Fieeexplore.ieee.org%2Fxpls%2Fabs_all.jsp%3Fisnumber%3D26902%26arnumber%3D1196085%26count%3D43%26index%3D20 Lien].
 
 
 
* PÊCHEUX F., LALLEMENT C.,
 
::''VHDL-AMS and Verilog-AMS as competitive solutions'',
 
:: System Specification and Design Languages, 2003, pp. 41-43, 5th Forum on Specification and Design Languages (FDL'02), Marseille (France), September 24-27, 2002, edited by E. Villar, J.P. Mermet, Kluwer Academic Publishers, ISBN 978-1-4020-7414-1. Lien
 
 
 
* PRÉGALDINY F., LALLEMENT C., MATHIOT D.,
 
:: ''Modélisation analytique avancée des capacités parasites du transistor MOS fortement submicronique'',
 
:: VIèmes Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM'2003), Toulouse (France), May 14-16, 2003, Actes pp. 311-313. Lien
 
 
 
* PRÉGALDINY F., LALLEMENT C., GRABINSKI W., KAMMERER J.B., MATHIOT D.,
 
::''An analytical quantum model for the surface potential of deep-submicron MOSFETs'',
 
:: 10th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2003), Lodz (Poland), June 26-28, 2003, Proc. pp. 98-104, papier invité.
 
 
 
* PRÉGALDINY F., LALLEMENT C., MATHIOT D.,
 
::''Quantum surface potential model suitable for advanced MOSFETs simulation'',
 
:: IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'03), Boston (USA), September 3-5, 2003, Proc. pp. 227-230. Lien
 
 
 
 
 
 
 
----
 
 
 
2002
 
 
 
* PRÉGALDINY F., LALLEMENT C., MATHIOT D.,
 
:: ''A simple efficient model of parasitic capacitances of deep-submicron LDD MOSFETs'',
 
:: Solid-State Electronics, vol. 46, pages 2191-2198, décembre 2002. [http://www.sciencedirect.com/science/article/pii/S0038110102002484 Lien]
 
 
 
* BUCHER M., ENZ C., KRUMMENACHER F., SALLESE J.M., LALLEMENT C., PORRET A.S.,
 
::''The EKV compact MOS transistor model: Accounting for deep-submicron aspects'',
 
:: 5th International Conference on Modeling and Simulation of Microsystems (MSM 2002), San Juan (USA), April 22-25, 2002, Proc. pp. 670-673, ISBN 0-9708275-7-1, papier invité. Lien
 
 
 
* BUCHER M., SALLESE J.M., KRUMMENACHER F., KAZAZIS D., LALLEMENT C., GRABINSKI W., ENZ C.,
 
:: ''EKV 3.0: An analog design-oriented MOS transistor model'',
 
:: 9th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2002), Wroclaw (Poland), June 20-22, 2002, Proc. pp. 51-54, papier invité.
 
 
 
* LALLEMENT C., PÊCHEUX F., HERVÉ Y.,
 
:: ''VHDL-AMS case study: The incremental design of an efficient 3rd generation MOS model of deep sub micron transistor'',
 
:: SOC Design Methodologies, 2002, pp. 467-472, 11th International Conference on Very Large Scale Integration of Systems-on-Chip (IFIP VLSI-SOC 2001), Montpellier (France), December 3-5, 2001, edited by M. Robert, B. Rouzeyre, C. Piguet, M.L. Flottes, Kluwer Academic Publishers, ISBN 1-4020-7148-5. Lien
 
 
 
* LALLEMENT C., PÊCHEUX F., GRABINSKI W.,
 
::''High level description of thermodynamical effects in the EKV 2.6 MOST model'',
 
::9th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2002), Wroclaw (Poland), June 20-22, 2002, Proc. pp. 45-50, papier invité.
 
 
 
* PRÉGALDINY F., LALLEMENT C., MATHIOT D.,
 
:: ''Extrinsic capacitance model for advanced MOSFET design'',
 
:: MOS Modeling and Parameter Extraction Group Meeting, Erfurt (Germany), October 21, 2002. Lien
 
 
 
 
 
 
 
----
 
 
 
2001
 
 
 
* BUCHER M., SALLESE J.M., LALLEMENT C.,
 
::''Accounting for quantum effects and polysilicon depletion in an analytical design-oriented MOSFET model'',
 
:: International Conference on Simulation of Semiconductor Processes and Devices (SISPAD 01), Athens (Greece), September 5-7, 2001, Proc. pp. 296-299, edited by D. Tsoukalas, C. Tsamis, Springer Verlag, Vienna, New York, ISBN 3-211-83708-6.
 
 
 
* LALLEMENT C., PÊCHEUX F., HERVÉ Y.,
 
:: ''VHDL-AMS design of a MOST model including deep submicron and thermal-electronic effects'',
 
:: 5th IEEE International Workshop on Behavioral Modeling and Simulation (BMAS 2001), Santa Rosa (USA), October 10-12, 2001, Proc. pp. 91-96, ISBN 0-7803-7291-3. Lien
 
 
 
* SALLESE J.M., GRABINSKI W., PORRET A.S., BUCHER M., LALLEMENT C., KRUMMENACHER F., ENZ C., FAZAN P.,
 
:: ''Advancements in DC and RF MOSFET modelling with the EPFL-EKV charge based model'',
 
:: 8th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'2001), Zakopane (Poland), June 21-23, 2001, Proc. pp. 45-52, edited by A. Napieralski, Tech. Univ. Lodz.
 
 
 
 
 
 
 
----
 
2000
 
 
 
* SALLESE J.M., BUCHER M., LALLEMENT C.,
 
:: ''Improved analytical modelling of polysilicon depletion in MOSFETs for circuit simulation'',
 
:: Solid-State Electronics 44, 2000, pp. 905-912. [http://www.sciencedirect.com/science/article/pii/S003811010000023X Lien].
 
 
 
* SALLESE J.M., BUCHER M., LALLEMENT C., GRABINSKI W.,
 
:: ''Advances in AC modelling of MOSFET using EKV formalism'',
 
:: Silicon RF-IC: Modeling and Simulation Workshop, Lausanne (Switzerland), February 24-25, 2000.
 
 
 
[[en:Technologies_for_computer_aided_design]]
 

Version du 13 septembre 2016 à 16:03


The integrating of ever more complex systems requires adapted conception tools and methods. Indeed, functional and technological constraints are constantly increasing with ever smaller tolerance and shorter time-to-market. In order to meet these constraints, the typical approaches need be revised and adapted, taking complementary concepts such as increased formalism, reuse and capitalization of knowledge bases into account.

The SMH team develops compact models and multiphysics design tools dedicated to analog and mixed signal integrated systems. We develop new conception approaches dedicated to multidisciplinary systems using formal specification and hardware description languages. This is done by extending the use of applied mathematics developed for other purposes, such as for instance interval arithmetic. The goal is to improve the computation speed while keeping as close as should be to the physical behavior of advanced devices.


Compact modeling

This research activity mainly focuses on the compact modeling of new fundamental devices such as ultimate transistors and also micro or nanoscale sensors developed within the team.

A large part of this activity has been dedicated to ultimate FET transistors modeling. For over 20 years now, our team has been closely working on that topic with teams from EPFL (Lausanne, Switzerland) and also URV (Tarragone, Spain). We carried out compact models for FinFET and multi-gate (featuring two, three, four gates and GAA) MOS devices. We have also been working on the modeling of junction-free nanowire-based FETs, which display promising performance in regard of future high-end IC technologies.

Sensors modeling is another part of our activity and represents a necessary step for optimizing integrated instrumentation systems. Within that framework we developed models for magnetic sensors based on the Hall effect (HHD and VHD) and charge deflection (CHOPFET).

More recently we started new research projects on the modeling of chemical sensors. We have been specifically studying two kinds of sensors, carbon nanotube FET (CNTFET) on one hand and ion sensitive FET (ISFET) on the other. Both devices can be potentially functionalized in order to be used as biosensors.

Related projects

The principal projects related to the compact modeling activities are:

  • FP7 COMON, ended 2012, "Modeling of multi-gate SOI transistors and of junction-free nanowire-based transistors"
  • XYZ-IRM project, "Development of a dedicated system for active minimally-invasive surgery tools tracking in IRM environment"
  • ANR CAPTEX, 2010-2013, "Modeling of CNTFET-based explosive gas sensors and development of their dedicated fully integrated conditioning electronics"
  • industrial project in collaboration with BURKERT company, "Virtual prototyping of Lab-on-Chip (LoC) for pollutant detection"

High-level multiphysics modeling and simulation tools

In order to be able to meet the ever growing requirements in IT and mobile devices, the IC manufacturers gradually turn to 3D integration, which consists in stacking chips thus forming complex single-package systems. Such an approach allows to look into the opportunity of new solutions to stick to Moore's law or even achieve "more than Moore" performance, but it also come with several shortcomings. In particular, evacuating the heat produced within an integrated chip is particularly difficult and induces an increase of the average operating temperature and also hotter spots. Besides being responsible for higher power consumption, these thermal issues also induce additional mechanical constraints due to material expansion and have overall negative impact on chips' reliability.

As it is the aging mechanisms that occur in integrated circuits (electromigration NBTI,...) are all the more important with high temperature. In order to minimize these harmful effects, it has now become essential to take thermal and mechanical characteristics at the early stage of IC development.

In that context, since 2009 we have been working on the development of a multiphysics (i.e. electrothermal and mechanical) simulator, embedded into one of industry's standard CAD tool, namely CADENCE®. Now, our team is in possession of an experimentally validated operational tool dedicated to simulating electrothermal and mechanical behavior in the IC engineering flow. This enables high accuracy circuit behavior simulation and should ultimately allow accurate forecasting of an integrated system's lifetime, i.e. prior to failure.

Related projects

The principal projects related to the compact modeling activities are:

  • ANR 3D-IDEAS, ended 2012, "Integration and 3D conception technology for imaging systems and applications"