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* Chevillon N., Sallese J.-M. , Lallement C., Prégaldiny F., Madec M., Sedlmeir J. and Aghassi J., “Generalization of the Concept of Equivalent Thickness and Capacitance to Multigate MOSFETs Modeling”, IEEE Transaction on Electron Devices, vol. 59, N° 1, pages 60-71, 2012 [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6062403&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D6062403 Lien] | * Chevillon N., Sallese J.-M. , Lallement C., Prégaldiny F., Madec M., Sedlmeir J. and Aghassi J., “Generalization of the Concept of Equivalent Thickness and Capacitance to Multigate MOSFETs Modeling”, IEEE Transaction on Electron Devices, vol. 59, N° 1, pages 60-71, 2012 [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=6062403&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D6062403 Lien] | ||
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* Gendrault Y., Madec M., Lallement C., Pêcheux F., Haiech J., “Synthetic biology methodology and model refinement based on microelectronic modeling tools and languages” in Biotechnologies Journal, vol. 6, pp. 796-806, 2011. [http://onlinelibrary.wiley.com/doi/10.1002/biot.201100083/abstract Lien] | * Gendrault Y., Madec M., Lallement C., Pêcheux F., Haiech J., “Synthetic biology methodology and model refinement based on microelectronic modeling tools and languages” in Biotechnologies Journal, vol. 6, pp. 796-806, 2011. [http://onlinelibrary.wiley.com/doi/10.1002/biot.201100083/abstract Lien] | ||
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* Yesayan A., Prégaldiny F., Chevillon N., Lallement C., Sallese J.-M., “Physics-based compact model for ultra-scaled finFETs, Solid-State Electronics, vol. 62, pages 165-173, août 2011.[http://www.sciencedirect.com/science/article/pii/S0038110111000992 Lien] | * Yesayan A., Prégaldiny F., Chevillon N., Lallement C., Sallese J.-M., “Physics-based compact model for ultra-scaled finFETs, Solid-State Electronics, vol. 62, pages 165-173, août 2011.[http://www.sciencedirect.com/science/article/pii/S0038110111000992 Lien] | ||
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* O’Connor I., Liu J., Gaffiot F., Prégaldiny F., Lallement C., Maneux C., Goguet J., Frégonèse S., Zimmer T., Anghel L., Dang T., Leveugle R., “CNTFET Modeling and Reconfigurable Logic Circuit Design”, IEEE Transactions on Circuits and Systems - I: Regular papers, vol. 54, n°11, pages 2365 - 2379, novembre 2007. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4383253&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D4383253 Lien] | * O’Connor I., Liu J., Gaffiot F., Prégaldiny F., Lallement C., Maneux C., Goguet J., Frégonèse S., Zimmer T., Anghel L., Dang T., Leveugle R., “CNTFET Modeling and Reconfigurable Logic Circuit Design”, IEEE Transactions on Circuits and Systems - I: Regular papers, vol. 54, n°11, pages 2365 - 2379, novembre 2007. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4383253&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D4383253 Lien] | ||
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* Pêcheux F., Lallement C., Vachoux A., “VHDL-AMS and Verilog-AMS as alternative HDL's for the Efficient Modeling of Multi-disciplines Schemes,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, n°2, pages 204-225, février 2005. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1386377&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D1386377 Lien] | * Pêcheux F., Lallement C., Vachoux A., “VHDL-AMS and Verilog-AMS as alternative HDL's for the Efficient Modeling of Multi-disciplines Schemes,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, n°2, pages 204-225, février 2005. [http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=1386377&url=http%3A%2F%2Fieeexplore.ieee.org%2Fstamp%2Fstamp.jsp%3Ftp%3D%26arnumber%3D1386377 Lien] | ||
* Sallese J.-M., Krummenacher F., Prégaldiny F., Lallement C., Roy A., Enz C., “A design oriented current model for DG MOSFET and its correlation with the EKV formalism,” Solid-State Electronics, vol. 49 pages 485-489, mars 2005. [http://www.sciencedirect.com/science/article/pii/S0038110104003491 Lien] | * Sallese J.-M., Krummenacher F., Prégaldiny F., Lallement C., Roy A., Enz C., “A design oriented current model for DG MOSFET and its correlation with the EKV formalism,” Solid-State Electronics, vol. 49 pages 485-489, mars 2005. [http://www.sciencedirect.com/science/article/pii/S0038110104003491 Lien] | ||
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* Prégaldiny F., Lallement C., Mathiot D., “Accounting for quantum mechanical effects from accumulation to inversion, in a fully analytical surface-potential-based MOSFET model”, Solid-State Electronics, vol. 48, n° 5, pages 781-787, mai 2004. [http://www.sciencedirect.com/science/article/pii/S0038110103004313 Lien] | * Prégaldiny F., Lallement C., Mathiot D., “Accounting for quantum mechanical effects from accumulation to inversion, in a fully analytical surface-potential-based MOSFET model”, Solid-State Electronics, vol. 48, n° 5, pages 781-787, mai 2004. [http://www.sciencedirect.com/science/article/pii/S0038110103004313 Lien] | ||
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* Prégaldiny F., Lallement C., Mathiot D., “A simple efficient model of parasitic capacitances of deep-submicron LDD MOSFETs,” Solid-State Electronics, vol. 46, pages 2191-2198, décembre 2002. [http://www.sciencedirect.com/science/article/pii/S0038110102002484 Lien] | * Prégaldiny F., Lallement C., Mathiot D., “A simple efficient model of parasitic capacitances of deep-submicron LDD MOSFETs,” Solid-State Electronics, vol. 46, pages 2191-2198, décembre 2002. [http://www.sciencedirect.com/science/article/pii/S0038110102002484 Lien] | ||
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Version du 1 février 2013 à 19:25
Publications depuis 2000
2013
2012
- Chevillon N., Sallese J.-M. , Lallement C., Prégaldiny F., Madec M., Sedlmeir J. and Aghassi J., “Generalization of the Concept of Equivalent Thickness and Capacitance to Multigate MOSFETs Modeling”, IEEE Transaction on Electron Devices, vol. 59, N° 1, pages 60-71, 2012 Lien
2011
- Gendrault Y., Madec M., Lallement C., Pêcheux F., Haiech J., “Synthetic biology methodology and model refinement based on microelectronic modeling tools and languages” in Biotechnologies Journal, vol. 6, pp. 796-806, 2011. Lien
- Heitz J., Leroy Y., Hebrard L., Lallement C., “Theoretical characterization of the topology of connected carbon nanotubes in random networks”, Nanotechnology 22, 345703, pages 1-7, 2011. Lien
- Sallese J.-M., Chevillon N., Lallement C., Iñiguez B., Prégaldiny F., “Charge Based Modelling of Junctionless Double Gate Field-Effect Transistors”, IEEE Transactions on Electron Devices,vol. 58, pages 2628-2637, août 2011.Lien
- Yesayan A., Prégaldiny F., Chevillon N., Lallement C., Sallese J.-M., “Physics-based compact model for ultra-scaled finFETs, Solid-State Electronics, vol. 62, pages 165-173, août 2011.Lien
2010
2009
2008
2007
- O’Connor I., Liu J., Gaffiot F., Prégaldiny F., Lallement C., Maneux C., Goguet J., Frégonèse S., Zimmer T., Anghel L., Dang T., Leveugle R., “CNTFET Modeling and Reconfigurable Logic Circuit Design”, IEEE Transactions on Circuits and Systems - I: Regular papers, vol. 54, n°11, pages 2365 - 2379, novembre 2007. Lien
2006
2005
- Pêcheux F., Lallement C., Vachoux A., “VHDL-AMS and Verilog-AMS as alternative HDL's for the Efficient Modeling of Multi-disciplines Schemes,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, n°2, pages 204-225, février 2005. Lien
- Sallese J.-M., Krummenacher F., Prégaldiny F., Lallement C., Roy A., Enz C., “A design oriented current model for DG MOSFET and its correlation with the EKV formalism,” Solid-State Electronics, vol. 49 pages 485-489, mars 2005. Lien
2004
- Prégaldiny F., Lallement C., Mathiot D., “Accounting for quantum mechanical effects from accumulation to inversion, in a fully analytical surface-potential-based MOSFET model”, Solid-State Electronics, vol. 48, n° 5, pages 781-787, mai 2004. Lien
2003
- Prégaldiny F., Lallement C., Mathiot D., “A simple efficient model of parasitic capacitances of deep-submicron LDD MOSFETs,” Solid-State Electronics, vol. 46, pages 2191-2198, décembre 2002. Lien
2002
2001
2000